| Mining parametric temporal logic properties in model-based design for cyber-physical systems |
4 |
| Spatio-temporal model checking of vehicular movement in public transport systems |
4 |
| Formal modeling and analysis of ad hoc Zone Routing Protocol in Event-B |
3 |
| Exact finite-state machine identification from scenarios and temporal properties |
2 |
| Towards formal methods diversity in railways: an experience report with seven frameworks |
2 |
| First international Competition on Runtime Verification: rules, benchmarks, tools, and final results of CRV 2014 |
2 |
| Reliable benchmarking: requirements and solutions |
2 |
| Automated translation of VDM to JML-annotated Java |
2 |
| Combining sequentialization-based verification of multi-threaded C programs with symbolic Partial Order Reduction |
2 |
| Symmetry reduction in CSP model checking |
2 |
| EDSKETCH: execution-driven sketching for Java |
2 |
| Stateless model checking of the Linux kernel's read-copy update (RCU) |
1 |
| An integrated environment for Spin-based C code checking Towards bringing model-driven code checking closer to practitioners |
1 |
| Fair testing and stubborn sets |
1 |
| Discrete and continuous strategies for timed-arc Petri net games |
1 |
| Slicing ATL model transformations for scalable deductive verification and fault localization |
1 |
| Automated reasoning for attributed graph properties |
1 |
| Parallel reachability analysis of hybrid systems in XSpeed |
1 |
| Fast detection of concurrency errors by state space traversal with randomization and early backtracking |
1 |
| The Symbolic Execution Debugger (SED): a platform for interactive symbolic execution, debugging, verification and more |
1 |
| Scalable and precise estimation and debugging of the worst-case execution time for analysis-friendly processors: a comeback of model checking |
1 |
| What's decidable about parametric timed automata? |
1 |
| Hybrid automata: from verification to implementation |
1 |
| PRISM-games: verification and strategy synthesis for stochastic multi-player games with multiple objectives |
1 |
| Advances in probabilistic model checking with PRISM: variable reordering, quantiles and weak deterministic Buchi automata |
1 |
| High-level frameworks for the specification and verification of scheduling problems |
1 |
| Model-based testing strategies and their (in)dependence on syntactic model representations |
1 |
| Applying supervisory control synthesis to priced featured automata and energy problems |
1 |
| TSTL: the template scripting testing language |
1 |
| Software engineering practices and Simulink: bridging the gap |
0 |
| Automatic refactoring of delta-oriented SPLs to remove-free form and replace-free form |
0 |
| Quantitative properties of featured automata |
0 |
| Verification and abstraction of real-time variability-intensive systems |
0 |
| Sampling strategies for product lines with unbounded parametric real-time constraints |
0 |
| Quantitative variability modelling and analysis |
0 |
| Integrated formal verification of safety-critical software |
0 |
| Assessing SMT and CLP approaches for workflow nets verification |
0 |
| Qualitative and quantitative analysis of safety-critical systems with |
0 |
| Runtime verification of autopilot systems using a fragment of MTL- |
0 |
| Multi-core symbolic bisimulation minimisation |
0 |
| The Tinker tool for graphical tactic development |
0 |
| Coqoon An IDE for interactive proof development in Coq |
0 |
| A qualitative assessment of alpha Rby in the perspective of the supervisory control theory |
0 |
| Formal specification and implementation of an automated pattern-based parallel-code generation framework |
0 |
| From high-level modeling toward efficient and trustworthy circuits |
0 |
| TestREx: a framework for repeatable exploits |
0 |
| Greedy pebbling for proof space compression |
0 |
| CINCO: a simplicity-driven approach to full generation of domain-specific graphical modeling tools |
0 |
| To split or to group: from divide-and-conquer to sub-task sharing for verifying multiple properties in model checking |
0 |
| Modelling and simulating a Thai railway signalling system using Coloured Petri Nets |
0 |
